diff --git a/src/mapleall/maple_be/src/be/lower.cpp b/src/mapleall/maple_be/src/be/lower.cpp index 83850176ef5d8399db35a8762dee00c422135020..2b7abc903feb70930fff16b825d41d0b3837ac24 100644 --- a/src/mapleall/maple_be/src/be/lower.cpp +++ b/src/mapleall/maple_be/src/be/lower.cpp @@ -1876,7 +1876,7 @@ BlockNode *CGLowerer::LowerBlock(BlockNode &block) { newLabelIdx = GetLabelIdx(*mirModule.CurFunction()); defaultLabel = mirBuilder->CreateStmtLabel(newLabelIdx); } - SwitchLowerer switchLowerer(mirModule, static_cast(*stmt), switchAllocator); + SwitchLowerer switchLowerer(mirModule, static_cast(*stmt), this, switchAllocator); BlockNode *blk = switchLowerer.LowerSwitch(newLabelIdx); if (blk->GetFirst() != nullptr && defaultLabel != nullptr && IsSwitchToRangeGoto(*blk)) { blk->AddStatement(defaultLabel); diff --git a/src/mapleall/maple_be/src/be/switch_lowerer.cpp b/src/mapleall/maple_be/src/be/switch_lowerer.cpp index d361660d445046a1715626d0b0096906183d57a1..b9f12d3a405caa2a04946401551ebc453c638a7f 100644 --- a/src/mapleall/maple_be/src/be/switch_lowerer.cpp +++ b/src/mapleall/maple_be/src/be/switch_lowerer.cpp @@ -286,7 +286,7 @@ BlockNode *SwitchLowerer::BuildCodeForSwitchItems(int32 start, int32 end, bool l if (Options::profileUse && freqPriority) { for (std::pair f2c : freq2case) { uint32 idx = static_cast(f2c.second); - cGoto = BuildCondGotoNode(switchItems[idx].first, OP_brtrue, *BuildCmpNode(OP_eq, switchItems[idx].first)); + cGoto = BuildCondGotoNode(idx, OP_brtrue, *BuildCmpNode(OP_eq, idx)); if (cGoto != nullptr) { localBlk->AddStatement(cGoto); } diff --git a/src/mapleall/maple_me/src/me_cfg.cpp b/src/mapleall/maple_me/src/me_cfg.cpp index b2e0986c397ecd7216bd07396753ab0076dabf3e..9d02e767184afdecc46d8061c71f134e59cc24a2 100644 --- a/src/mapleall/maple_me/src/me_cfg.cpp +++ b/src/mapleall/maple_me/src/me_cfg.cpp @@ -1935,14 +1935,14 @@ void MeCFG::ConstructBBFreqFromStmtFreq() { if ((*bIt)->IsEmpty()) continue; StmtNode &first = (*bIt)->GetFirst(); StmtNode &last = (*bIt)->GetLast(); - if (funcData->stmtFreqs.count(first.GetStmtID()) > 0) { + if (funcData->stmtFreqs.count(first.GetStmtID()) >= 0) { (*bIt)->SetFrequency(funcData->stmtFreqs[first.GetStmtID()]); - } else if (funcData->stmtFreqs.count(last.GetStmtID()) > 0) { + } else if (funcData->stmtFreqs.count(last.GetStmtID()) >= 0) { (*bIt)->SetFrequency(funcData->stmtFreqs[last.GetStmtID()]); } else { bool foundFreq = false; for (StmtNode &stmt : (*bIt)->GetStmtNodes()) { - if (funcData->stmtFreqs.count(stmt.GetStmtID()) > 0) { + if (funcData->stmtFreqs.count(stmt.GetStmtID()) >= 0) { (*bIt)->SetFrequency(funcData->stmtFreqs[stmt.GetStmtID()]); foundFreq = true; break; diff --git a/src/mapleall/maple_me/src/pme_mir_lower.cpp b/src/mapleall/maple_me/src/pme_mir_lower.cpp index c30a98121817e3df323d92c9dd4404b4b9e1cb30..9587b2832a7bc9a7c1ecf714379b943a95d1e7ee 100644 --- a/src/mapleall/maple_me/src/pme_mir_lower.cpp +++ b/src/mapleall/maple_me/src/pme_mir_lower.cpp @@ -120,7 +120,7 @@ BlockNode *PreMeMIRLower::LowerIfStmt(IfStmtNode &ifstmt, bool recursive) { if (GetFuncProfData()) { GetFuncProfData()->CopyStmtFreq(evalstmt->GetStmtID(), ifstmt.GetStmtID()); } - } else if (elseempty && !GetFuncProfData()) { + } else if (elseempty && !Options::profileUse && !Options::profileGen) { // brfalse // // label @@ -157,7 +157,7 @@ BlockNode *PreMeMIRLower::LowerIfStmt(IfStmtNode &ifstmt, bool recursive) { GetFuncProfData()->GetStmtFreq(ifstmt.GetThenPart()->GetStmtID()); GetFuncProfData()->SetStmtFreq(labstmt->GetStmtID(), freq); } - } else if (thenempty && !GetFuncProfData()) { + } else if (thenempty && !Options::profileUse && !Options::profileGen) { // brtrue // // label @@ -286,14 +286,16 @@ BlockNode *PreMeMIRLower::LowerIfStmt(IfStmtNode &ifstmt, bool recursive) { } ifInfo->endLabel = endlabelidx; } - if (GetFuncProfData()) { + if (Options::profileUse || Options::profileGen) { // generate extra label to avoid critical edge LabelIdx extraLabelIdx = mirFunc->GetLabelTab()->CreateLabelWithPrefix('x'); preMeFunc->SetIfLabelCreatedByPreMe(extraLabelIdx); LabelNode *extraLabelNode = mirbuilder->CreateStmtLabel(extraLabelIdx); blk->AddStatement(extraLabelNode); - // set stmtfreqs - GetFuncProfData()->CopyStmtFreq(extraLabelNode->GetStmtID(), ifstmt.GetStmtID()); + if (GetFuncProfData()) { + // set stmtfreqs + GetFuncProfData()->CopyStmtFreq(extraLabelNode->GetStmtID(), ifstmt.GetStmtID()); + } } return blk; } diff --git a/src/mapleall/mpl2mpl/src/inline.cpp b/src/mapleall/mpl2mpl/src/inline.cpp index c3e558608215559ed73ba54ebe4a34f891e8778b..66cd933afd0df4e8bada43139390b4215bff1d1d 100644 --- a/src/mapleall/mpl2mpl/src/inline.cpp +++ b/src/mapleall/mpl2mpl/src/inline.cpp @@ -531,7 +531,7 @@ void MInline::InlineCallsBlockInternal(MIRFunction &func, BaseNode &baseNode, bo CallInfo *callInfo = cgNode->GetCallInfo(callStmt); std::pair canInlineRet = InlineAnalyzer::CanInlineImpl({&func, callee}, callStmt, *cg, currInlineDepth, true); // earlyInline: true - bool canInline = canInlineRet.first; + bool canInline = canInlineRet.first && callStmt.GetEnclosingBlock(); InlineFailedCode failCode = canInlineRet.second; if (callInfo != nullptr) { // cache result to avoid recompute callInfo->SetInlineFailedCode(failCode);